A book entitled xe2x80x9cNonvolatile Semiconductor Memory Technologyxe2x80x9d, Edited by William D. Brown and Joe. E. Brewer and published by IEEE Press (1998), ISBN 0-7803-1173-6, states, on page 1 xe2x80x9cThe ultimate solutionxe2x80x94a genuine nonvolatile RAM that retains data without external power, can be read from or programmed like a static or dynamic RAM, and still achieve high-speed, high-density, and low power consumptions at an acceptable costxe2x80x94remains unfeasible to this day.xe2x80x9d On page 6, this book describes a class of nonvolatile memory devices that store a charge on a conducting or semiconducting layer (called xe2x80x9cfloating gatexe2x80x9d) that is completely surrounded by dielectric and an opposing layer (called xe2x80x9ccontrol gatexe2x80x9d) that together form a capacitor (commonly known as xe2x80x9cstorage capacitorxe2x80x9d).
An article entitled xe2x80x9cApplied Materials Introduces New Storage Capacitor Solution for Gigabit DRAMsxe2x80x9d dated Jul. 8, 1998 describes use of tantalum pentoxide (Ta2O5) to form storage capacitors in memory devices. Such a storage capacitor cannot hold its charge over an extended period of time and loses a stored data bit unless its charge is refreshed periodically, as described at http://www.ee.cooper.edu/courses/course pages/past courses/EE151/MEMS HO1/. As described therein, the periodic refreshing requires additional memory circuitry and complicates the operation of dynamic random access memory (DRAM) formed from such capacitors.
The above-described periodic refreshing can be avoided by flash memory. There are several kinds of flash memory, including a single-transistor cell and a two-transistor cell as described in an article in Electronic Design, dated Aug. 9, 1999, and entitled xe2x80x9cFeature-Rich Flash Memories Deliver High Densityxe2x80x9d by Dave Bursky. As described therein, a single-transistor cell is employed in a NOR-like logic structure to form a random-access storage array (called xe2x80x9cflash EPROMxe2x80x9d). Moreover, the two-transistor (or a merged transistor, dual-gate) cell is also a NOR-style configuration (called xe2x80x9cflash EEPROMxe2x80x9d). On-chip decoding circuits divide an array of two-transistor cells into small blocks (256 bytes to 4 kbytes) that normally enable a smaller portion of the chip to be erased and reprogrammed.
Several issues exist with the flash memory as described in the above-identified book by Brown and Brewer, such as slow trapping, polarization, oxide breakdown/leakage, hot-electron injection, and oxide-hopping conduction, as described in Table 6.2 on page 362
In accordance with the invention, a semiconductor substrate has formed therein an inductor and a capacitor integrated into a single device (called an xe2x80x9cinductive capacitorxe2x80x9d). The inductor causes the capacitor to charge faster than the charging of a prior art device that has significant capacitance but negligible inductance (e.g. a device in which the capacitive contribution to the resonant frequency (of an LC circuit formed by such a prior art device) is greater than 90% of the inductive contribution). The device can include any structure that implements the inductive and capacitive functions in an integrated manner. Such a device having a significant inductive effect can be used in any radio-frequency (RF) circuit.
In one embodiment, the device includes a rod-shaped second element (hereinafter simply xe2x80x9cplugxe2x80x9d) that is located in an interior space defined by a sleeve-shaped first element (hereinafter simply xe2x80x9csleevexe2x80x9d), thereby to form a capacitor (also called xe2x80x9cfirst capacitorxe2x80x9d) and an inductor in the same device. The core is separated from the sleeve by a dielectric material (also called xe2x80x9ctrap materialxe2x80x9d) that stores an electrical charge when the device is powered off (such as siliconxe2x80x94silicon dioxide interface). An inductive capacitor that includes a trap material between the two elements is also referred to as an xe2x80x9cinductive storage capacitor.xe2x80x9d Such an inductive storage capacitor is used to implement a nonvolatile memory cell in one application, and a timing circuit in another application.